Many electronic systems require both positive and negative voltages to operate properly. Generating an efficient, low-voltage positive output from a higher voltage input typically entails the use of a ...
Solving the design challenge to efficiently deliver higher battery charge current in small portable applications, Texas Instruments Incorporated (TI) (NYSE: TXN) announced the first synchronous, ...
Buck regulators are usually the first choice when you design nonisolated step-down regulators unless the ratio of V IN to V OUT is greater than 10, the input voltage is high, or both. Low duty cycle ...
Technology developed for driving synchronous FETs in flyback topologies can be directly applied in LLC topologies. This technology offers significant gains in efficiency for applications with low ...
Asynchronous vs. synchronous topologies. How a synchronous boost LED controller minimizes efficiency losses. The challenge of low-input-voltage operation. High-power LEDs continue to proliferate in ...
This paper presents a system providing accurate clock alignment for on-die and die-to-die synchronous circuits. A low-frequency reference clock provides an accurate timing reference with low power ...
Wire delay is beginning to dominate gate delay in current CMOS technologies. According to Moore’s Law by 2016 CMOS feature size should be on the order of 22 nm with clock frequencies reaching around ...